Software

Analogue to digital and digital to analogue simulation software. Signal Conversion’s SATS software can support ADC and DAC testing and also simulation. The following is an outline of the SATS simulation package SATS software features. Signal analysis and test system (SATS) software is unique in that specialised software for testing the performance of analogue or digital interface circuitry is available: this makes it possible to test and simulate the performance of analogue to digital and digital to analogue converter circuits without the need for expensive dedicated test systems. All modes of operation are controlled from an option parameter list specified for each program module (similar UNIX system utilities), and this parameter list may be altered in a macro file which initiates and runs the SATS system. Therefore, no programming is required in order to modify the SATS configuration to suit any individual requirements. The software is easy to use as it is menu driven and can be easily set up for complex operations, simply by using a text editor. Other systems require re-compilation of the software. The system can log all keyboard commands to a macro file so that the system can self-learn a test procedure. This is particularly useful for repeated tests when production testing. Microsoft Windows native system .

Menus can be easily customised by the user to suit each application. Data can be imported or exported in standard ASCII and other popular file formats.

Graphs Can be edited and data values displayed on screen using cursors e.g.for spot-noise measurements. A test information and results database is maintained for each graph: for test report generation and pass-fail limit checking in production tests. Database values can be recalled and overlaid on graphs.

Test results can be compiled in spreadsheet format.
OPERATOR mode provides a customised display showing pass/fail status andtest sequence, serial and device numbers etc for straightforward use in production and batch testing.
With colour displays, the system produces coloured outlines of the main format. As with many other aspects of SATS the background and outline colours can be changed by user commands without the need for re-programming. Graphs can be exported in formats suitable for use in desktop publishing.
After acquiring this data, the SATS system enables display and manipulation of the information . These can display graphs of:

  • Amplitude against time
  • Amplitude against frequency
  • Code-occurrence histogram
  • Threshold level against code
  • Differential linearity error versus code value
  • Integral linearity error against code value.

SATS ADC SIMULATOR enables DC threshold data or dynamic threshold data produced to be used to simulate the dynamic characteristics of the
ADC.
For example, FFT plots can be obtained without making FFT measurements. Thiscould be useful for changing ADC design parameter values interactively (e.g.
inserting a missing code).

It enables an applications engineer to decide quickly which ADC parameters might need to be changed to investigate a customer’s need for an unconventional
test specification (e.g. 5th order THD or intermodulation distortion at unusualtest frequencies). The predicted changes required can then be passed on to the
factory for assessment of design modifications required. Simulations are available for oversampling and interpolative data converters Histogram testing>Enables dynamic linearity error characteristics of ADC to be calculated and displayed. Sine wave test signals are applied to the ADC under test and the digital output is captured and converted to a file.

Time waveforms can be converted info code-occurrence histograms

Histograms can be accumulated as files, thus obviating the need for separate histogramming memory

Linearity errors can be measured reliably from histogram tests provided confidence limits are known. Confidence limited are calculated for both integral and differential linearity. These confidence limits can be used to determine the number of samples or averages required for a given test accuracy. A threshold file is also generated which can be used for error calculations. Results are presented in a tabular report format and include:

  • Device serial number and type
  • Data and time of test
  • Number of missing codes and their values
  • Maximum integral linearity error and code value
  • Maximum differential linearity error and code value
  • Code range exercised by test signal
  • Maximum and minimum code widths and positions.

Analogue to Digital Converter Errors

Results are placed in; SATS format binary data interchange file (DIF file). Integral and differential linearity errors are to be calculated and displayed from an ASCII data file of analogue to digital converter (ADC) threshold data or from a DIF file.
Averager
Enables the results in sets of binary DIF data files to be averaged e.g. for noise reduction or post processing of power spectrum calculated using the fast
 fourier transform post processor.

 Spectrum Analysis

A file of waveform amplitude samples is converted into a spectrum file by first calculating the FFT power spectrum. Five FFT windows are provided. Results are placed in a binary data file to enable graphical display.

  • The windowing presently available is:
  • Blackman-Harris
  • Hanning
  • Hamming
  • Rectangular
  • Custom

The Custom window has better than 300 dB of side-lobe suppression and this enables asynchronous testing of 24 bit ADCs with 1 M point and higher FFTs.

Click on screenshot to see larger image.

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Post-processing results are available in report form:

  • Signal to noise and distortion ratio
  • Signal to noise ration
  • Total harmonic distortion ratio
  • Harmonic spectrum
  • Effective bits. 

FFT Post Processing 

FFT DIF files can be processed to calculate many parameter values of interest. These can be displayed over the graph or are available in report format. This utility enables narrow-band noise measurement to be made using SATS cursors. Averaged FFT DIF files can be processed to obtain effective bits result
with short FFT lengths. 

Wave Generator

Enables sine, triangle and square waveform DIF data files to be generated. Amplitude, waveform, fundamental frequency, number of cycles, sampling frequency, number of bits per sample (for ideal ADC simulated results) and Testing to ANSI-IEEE Standards.. ADC and DAC circuits and systems can be tested to international standards.

ANSI-IEEE 746 and IEEE 1241 and IEC 60748-4-3  standards are supported and ISO9000 testing is also possible using the OPERATOR enhancement.

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